Memory Management Unit
ARM DDI0198D Copyright © 2001-2003 ARM Limited. All rights reserved. 3-17
Figure 3-10 Large page translation from a coarse page table
Because the upper four bits of the page index and low-order four bits of the coarse page
table index overlap, each coarse page table entry for a large page must be duplicated 16
times (in consecutive memory locations) in the coarse page table.
If a large page descriptor is included in a fine page table, the high-order six bits of the
page index and low-order six bits of the fine page table index overlap. Each fine page
table entry for a large page must therefore be duplicated 64 times.
Translation base
31 14 13 0
Translation base
31 14 13 2 1 0
Table index 0 0
Modified virtual address
Translation table base
Table index
31 20 19 16 15 12 11 0
L2
table index
Page index
Coarse page table base address
31 1098 543210
Domain 1 0 1
Coarse page table base address
31 10 9 2 1 0
L2 table index 0 0
Page base address
31 1615 1211109876543210
AP3 AP2 AP1 AP0 C B 0 1
Page base address
31 16 15 0
Page index
First-level descriptor
Second-level descriptor
Physical address
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