IDT 8A3 Series - ALERT_CFG.DPLL3_2_1_0_ALERT_MASK

116©2018 Integrated Device Technology, Inc September 12, 2018
8A3xxxx Family Programming Guide
ALERT_CFG.DPLL3_2_1_0_ALERT_MASK
GPIO alert enable masks (holdover, lock) for DPLL 0, 1, 2 and 3.
Table 141: ALERT_CFG.DPLL3_2_1_0_ALERT_MASK Bit Field Locations and Descriptions
Offset
Address
(Hex)
ALERT_CFG.DPLL3_2_1_0_ALERT_MASK Bit Field Locations
D7 D6 D5 D4 D3 D2 D1 D0
008h DPLL3_HOL
DOVER_MA
SK[7]
DPLL3_LOC
K_MASK[6]
DPLL2_HOL
DOVER_MA
SK[5]
DPLL2_LOC
K_MASK[4]
DPLL1_HOL
DOVER_MA
SK[3]
DPLL1_LOC
K_MASK[2]
DPLL0_HOL
DOVER_MA
SK[1]
DPLL0_LOC
K_MASK[0]
ALERT_CFG.DPLL3_2_1_0_ALERT_MASK Bit Field Descriptions
Bit Field Name Field Type Default Value Description
DPLL3_HOLDOVER_MAS
K[7]
R/W 0 DPLL 3 holdover state transition event enable mask.
If enabled, GPIO alert becomes active when
dpll3_holdover_state_change_sticky bit is set.
0 = disabled
1 = enabled
DPLL3_LOCK_MASK[6] R/W 0 DPLL 3 lock state transition event enable mask.
If enabled, GPIO alert becomes active when dpll3_lock_state_change_sticky bit
is set.
0 = disabled
1 = enabled
DPLL2_HOLDOVER_MAS
K[5]
R/W 0 DPLL 2 holdover state transition event enable mask.
If enabled, GPIO alert becomes active when
dpll2_holdover_state_change_sticky bit is set.
0 = disabled
1 = enabled
DPLL2_LOCK_MASK[4] R/W 0 DPLL 2 lock state transition event enable mask.
If enabled, GPIO alert becomes active when dpll2_lock_state_change_sticky bit
is set.
0 = disabled
1 = enabled
DPLL1_HOLDOVER_MAS
K[3]
R/W 0 DPLL 1 holdover state transition event enable mask.
If enabled, GPIO alert becomes active when
dpll1_holdover_state_change_sticky bit is set.
0 = disabled
1 = enabled
DPLL1_LOCK_MASK[2] R/W 0 DPLL 1 lock state transition event enable mask.
If enabled, GPIO alert becomes active when dpll1_lock_state_change_sticky bit
is set.
0 = disabled
1 = enabled