IDT 8A3 Series - DPLL_CTRL_0.DPLL_PRED1_DECIMATOR_BW_MULT; DPLL_CTRL_0.DPLL_PRED1

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8A3xxxx Family Programming Guide

DPLL_CTRL_0.DPLL_PRED1_DECIMATOR_BW_MULT

Predefined configuration 1 loop filter decimator bandwidth multiplier.

DPLL_CTRL_0.DPLL_PRED1_BW

Predefined configuration 1 loop filter bandwidth.

DPLL_CTRL_0.DPLL_PRED1_DAMPING Bit Field Descriptions

Bit Field Name Field Type Default Value Description

RESERVED N/A - This field must not be modified from the read value

DAMP_FTR[3:0] R/W 0 DPLL loop filter damping factor.

0 = 1.002, 0.02 dB, overdamp;

1 = 1.006, 0.05 dB, < 0.05 dB;

2 = 1.008, 0.07 dB, < 1%;

3 = 1.012, 0.10 dB, < 0.1 dB;

4 = 1.015 , 0.13 dB, < 2%;

5 = 1.022, 0.19 dB, < 0.2 dB;

6 = 1.053 , 0.45 dB, < 0.5 dB;

7 = 1.172 , 1.38 dB, underdamp

Table 262: DPLL_CTRL_0.DPLL_PRED1_DECIMATOR_BW_MULT Bit Field Locations and Descriptions

Offset

Address

(Hex)

DPLL_CTRL_0.DPLL_PRED1_DECIMATOR_BW_MULT Bit Field Locations

D7 D6 D5 D4 D3 D2 D1 D0

00Fh MULT[7:0]

DPLL_CTRL_0.DPLL_PRED1_DECIMATOR_BW_MULT Bit Field Descriptions

Bit Field Name Field Type Default Value Description

MULT[7:0] R/W 0 Unsigned 8-bit DPLL loop filter decimator bandwidth multiplier.

The decimator BW = decimator BW mult * DPLL BW. Value 0 implies maximum

decimator bandwidth.

Table 263: DPLL_CTRL_0.DPLL_PRED1_BW Bit Field Locations and Descriptions

Offset

Address

(Hex)

DPLL_CTRL_0.DPLL_PRED1_BW Bit Field Locations

D7 D6 D5 D4 D3 D2 D1 D0

010h DPLL_PRED1_BW[7:0]

011h BW_UNIT[15:14] DPLL_PRED1_BW[13:8]

IDT 8A3 Series - DPLL_CTRL_0.DPLL_PRED1_DECIMATOR_BW_MULT; DPLL_CTRL_0.DPLL_PRED1_BW