IDT 8A3 Series - STATUS.DPLL7_STATUS; STATUS.DPLL_SYS_STATUS

60©2018 Integrated Device Technology, Inc September 12, 2018
8A3xxxx Family Programming Guide
STATUS.DPLL7_STATUS
DPLL 7 status.
STATUS.DPLL_SYS_STATUS
System DPLL status.
Table 55: STATUS.DPLL7_STATUS Bit Field Locations and Descriptions
Offset
Address
(Hex)
STATUS.DPLL7_STATUS Bit Field Locations
D7 D6 D5 D4 D3 D2 D1 D0
01Fh RESERVED[7:6] DPLL7_HOL
DOVER_STA
TE_CHANG
E_STICKY[5]
DPLL7_LOC
K_STATE_C
HANGE_STI
CKY[4]
DPLL7_STATE[3:0]
STATUS.DPLL7_STATUS Bit Field Descriptions
Bit Field Name Field Type Default Value Description
RESERVED N/A - This field must not be modified from the read value
DPLL7_HOLDOVER_STAT
E_CHANGE_STICKY[5]
R/O 0 Holdover state change sticky bit.
Indicates whether any transition to or from Holdover state occurred.
0 = no transition to or from Holdover state
1 = transition to or from Holdover state
DPLL7_LOCK_STATE_CH
ANGE_STICKY[4]
R/O 0 Lock state change sticky bit.
Indicates whether any transition to or from Locked state occurred.
0 = no transition to or from Locked state
1 = transition to or from Locked state
DPLL7_STATE[3:0] R/O 0 Current state of DPLL7.
0 = freerun
1 = lockacq
2 = lockrec
3 = locked
4 = holdover
5 = open loop
Table 56: STATUS.DPLL_SYS_STATUS Bit Field Locations and Descriptions
Offset
Address
(Hex)
STATUS.DPLL_SYS_STATUS Bit Field Locations
D7 D6 D5 D4 D3 D2 D1 D0
020h RESERVED[
7]
RESERVED DPLL_SYS_
HOLDOVER
_STATE_CH
ANGE_STIC
KY[5]
DPLL_SYS_
LOCK_STAT
E_CHANGE_
STICKY[4]
DPLL_SYS_STATE[3:0]