IDT 8A3 Series - OUTPUT_TDC_0.OUTPUT_TDC_CTRL

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8A3xxxx Family Programming Guide

OUTPUT_TDC_0.OUTPUT_TDC_CTRL_3

Configure output TDC.

OUTPUT_TDC_0.OUTPUT_TDC_CTRL_2 Bit Field Descriptions

Bit Field Name Field Type Default Value Description

ALIGN_TARGET_MASK[7:

R/W 0 Used in alignment mode to indicate the target DPLL(s) to align with

'source_index'.

DPLL alignment target mask index.

Alignment mode: Each set bit represents the DPLLs to be aligned with the

'source_index' DPLL.

Bit 0 corresponds to DPLL0, bit 1 DPLL1, etc.

0b00000001 = DPLL0

. . .

0b10000000 = DPLL7

. . .

0b00000011 = DPLL0 and DPLL1

. . .

Table 380: OUTPUT_TDC_0.OUTPUT_TDC_CTRL_3 Bit Field Locations and Descriptions

Offset

Address

(Hex)

OUTPUT_TDC_0.OUTPUT_TDC_CTRL_3 Bit Field Locations

D7 D6 D5 D4 D3 D2 D1 D0

005h TARGET_INDEX[7:4] SOURCE_INDEX[3:0]

IDT 8A3 Series - OUTPUT_TDC_0.OUTPUT_TDC_CTRL_3