IDT 8A3 Series - DPLL_0.DPLL_REF_PRIORITY_16

166©2018 Integrated Device Technology, Inc September 12, 2018
8A3xxxx Family Programming Guide
DPLL_0.DPLL_REF_PRIORITY_16
Lower priority index is higher priority.
Table 202: DPLL_0.DPLL_REF_PRIORITY_16 Bit Field Locations and Descriptions
Offset
Address
(Hex)
DPLL_0.DPLL_REF_PRIORITY_16 Bit Field Locations
D7 D6 D5 D4 D3 D2 D1 D0
01Fh PRIORITY_GROUP_NUMBE
R[7:6]
PRIORITY_REF[5:1] PRIORITY_E
N[0]
DPLL_0.DPLL_REF_PRIORITY_16 Bit Field Descriptions
Bit Field Name Field Type Default Value Description
PRIORITY_GROUP_NUM
BER[7:6]
R/W 0 Priority group number.
For references in the same priority group, revertive switching is disabled.
PRIORITY_REF[5:1] R/W 0 Input reference index for priority 16.
0x00 = CLK0
0x01 = CLK1
0x02 = CLK2
0x03 = CLK3
0x04 = CLK4
0x05 = CLK5
0x06 = CLK6
0x07 = CLK7
0x08 = CLK8
0x09 = CLK9
0x0A = CLK10
0x0B = CLK11
0x0C = CLK12
0x0D = CLK13
0x0E = CLK14
0x0F = CLK15
0x10 = write-phase input
0x11 = write-frequency input
0x12 = XO_DPLL
PRIORITY_EN[0] R/W 0 Enable reference priority 16.
Enable reference priority 16 for the automatic reference selection.
0 = disabled
1 = enabled