IDT 8A3 Series - STATUS.DPLL5_FILTER_STATUS; STATUS.DPLL6_FILTER_STATUS

73©2018 Integrated Device Technology, Inc September 12, 2018
8A3xxxx Family Programming Guide
STATUS.DPLL5_FILTER_STATUS
DPLL 5 loop filter status.
STATUS.DPLL6_FILTER_STATUS
DPLL 6 loop filter status.
Table 72: STATUS.DPLL5_FILTER_STATUS Bit Field Locations and Descriptions
Offset
Address
(Hex)
STATUS.DPLL5_FILTER_STATUS Bit Field Locations
D7 D6 D5 D4 D3 D2 D1 D0
06Ch FILTER_STATUS[7:0]
06Dh FILTER_STATUS[15:8]
06Eh FILTER_STATUS[23:16]
06Fh FILTER_STATUS[31:24]
070h FILTER_STATUS[39:32]
071h FILTER_STATUS[47:40]
STATUS.DPLL5_FILTER_STATUS Bit Field Descriptions
Bit Field Name Field Type Default Value Description
FILTER_STATUS[47:0] R/O 0 DPLL loop filter status.
Fine phase measurement in units of 50/128 picoseconds.
Table 73: STATUS.DPLL6_FILTER_STATUS Bit Field Locations and Descriptions
Offset
Address
(Hex)
STATUS.DPLL6_FILTER_STATUS Bit Field Locations
D7 D6 D5 D4 D3 D2 D1 D0
074h FILTER_STATUS[7:0]
075h FILTER_STATUS[15:8]
076h FILTER_STATUS[23:16]
077h FILTER_STATUS[31:24]
078h FILTER_STATUS[39:32]
079h FILTER_STATUS[47:40]
STATUS.DPLL6_FILTER_STATUS Bit Field Descriptions
Bit Field Name Field Type Default Value Description
FILTER_STATUS[47:0] R/O 0 DPLL loop filter status.
Fine phase measurement in units of 50/128 picoseconds.