IDT 8A3 Series - GENERAL_STATUS.OTP_STATUS

24©2018 Integrated Device Technology, Inc September 12, 2018
8A3xxxx Family Programming Guide
GENERAL_STATUS.OTP_STATUS
Indicates status of OTP.
023h GENERAL_STATUS.OTP_CONFIG_STATUS OTP soft CSR configuration status.
024h GENERAL_STATUS.OTP_CSR_CONFIG_STA
TUS
OTP hard CSR configuration status.
025h RESERVED This register must not be modified from the read value
026h GENERAL_STATUS.EEPROM_CONFIG_STAT
US
EEPROM soft CSR configuration status.
Table 12: GENERAL_STATUS.OTP_STATUS Bit Field Locations and Descriptions
Offset
Address
(Hex)
GENERAL_STATUS.OTP_STATUS Bit Field Locations
D7 D6 D5 D4 D3 D2 D1 D0
004h OTP_STATUS[7:0]
005h OTP_STATUS[15:8]
006h OTP_STATUS[23:16]
007h OTP_STATUS[31:24]
Table 11: GENERAL_STATUS Register Index
Offset
(Hex)
Register Module Base Address: C014h
Individual Register Name Register Description