Model 2700 Multimeter/Switch System User’s Manual Limits and Digital I/O 9-7
When a limit (LO1, HI2, LO2, HL2) is reached, the digital output line for that limit will be
pulled high or low. When a reading is within the limit, the output line is released. Digital
output 5 is the logical OR of the four limits. Therefore, if any of the four limits are reached
or exceeded, output 5 will be pulled high or low.
NOTE When the reading is taken and a limit has been reached, there is a short delay
before the digital output line is active. As measured from the output trigger
(TLINK), the delay is about 10msec when closing a channel, and about 2msec
without a channel closure. Because of additional time needed for data
conversion, the delay can be up to 10 times longer for temperature readings.
Allow for this delay when designing test systems.
Logic sense
The selected logic sense (active high or active low) determines if an output is pulled high
or low when the limit is reached. If logic sense is set high, the output line will be pulled
high when the reading reaches or exceeds the limit. If logic sense is set low, the output line
will be pulled low to 0V when the reading reaches or exceeds the limit.
Pulse option
Pulse option is available for the digital outputs. When enabled, an output line will pulse
high or low (depending on the logic sense setting) for each reading that reaches or exceeds
the limit. The factory default time duration for the pulse is 2ms (maximum), but can be set
from 0.001 to 99999.999 seconds using remote programming. Pulse time cannot be set
from the front panel.
NOTE The commands to set pulse time and enable/disable pulse output are listed in
Table 9-2. See “Digital output commands” in the table.
The pulse time does not affect measurement speed. If a subsequent in-limit reading occurs
while the output line is being pulsed, the line will be released immediately (pulse
terminated).
Master limit latch
The master limit line is pulled high or low when one or more of the other four limits are
reached or exceeded. The master limit line can be programmed to release when a reading
is inside all four limits, or the master limit can be latched when a failure occurs. When
latched, the master limit line will not release until operation within the trigger model
returns to and passes the control source (see
Section 7 for details on triggering).
When scanning, the latched master limit line will not release until the scan is finished and
another scan is started. For example, if after testing a resistor network the master limit line
did set, then the network has passed all tests.
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