Model 2700 Multimeter/Switch System User’s Manual Status Structure 11-21
As shown in the above result for the AND operation, when B0 is set, your program routine
will generate a “1” to indicate that RAV is set. If B0 is not set (0), the AND operation will
result in “0” to indicate that RAV is not set.
Example 3 – Read BHF bit of measurement event register
The buffer half full bit (BHF) is read in the same manner that the RAV bit was read in
Example 2. The difference being that the BHF bit is enabled (not the RAV bit). The
following example performs 500 measurements and stores them in the buffer.
NOTE Details on using the buffer is provided in Section 6.
While measuring and storing readings, the status byte is continuously read to detect when
the BHF bit sets. This example also shows how to use *OPC (operation complete) to
determine when the measure-measure process is finished.
*RST ' Put 2700 in “one-shot” mode.
*CLS ' Clears measurement event register.
STAT:PRES ' Clears measurement event enable register.
STAT:MEAS:ENAB 256 ' Enables BHF bit B8 of the measurement event register.
*ESE 1 ' Enables OPC bit B0 of the standard event register.
TRAC:POIN 500 ' Sets buffer size to 500 readings.
TRAC:FEED SENS ' Sets to store raw readings.
TRIG:COUN 500 ' Sets 2700 to perform 500 measurements.
TRAC:FEED:CONT NEXT ' Enables buffer.
INIT ' Starts measurement and storage process.
*OPC ' Sets OPC bit B0 of standard event register after the
' measure-store process is finished.
While readings are being triggered and stored in the buffer, the following command
(*STB?) can be put into a program loop to continuously read the status byte.
*STB? ' Read status register.
By masking the status byte with binary 00000001 (decimal 1), only B0 will be read by
*STB?. The AND’ed result of the mask and the *STB? response will be either “0” (BHF
clear) or “1” (BHF set).
In the above command sequence, *ESE 1 enables the OPC bit. After *OPC is sent, the
OPC bit will set when the measure-store process is finished. After the BHF bit sets, you
can then continuously read the status byte to determine when the OPC bit sets. When OPC
sets, bit B5 (ESB) in the status byte sets. Since this time you only want to read bit B5, a
different mask will be needed:
B7 B6 B5 B4 B3 B2 B1 B0
0 0 1 0 0 0 0 0Mask to read B5 (decimal 32)
When a returned value for *STB? is AND’ed with the above mask, it will read “0” (OPC
clear) or “32” (OPC set).
NOTE More information on *OPC is provided in Section 12.
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