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Raven PCI Host Bridge & Multi-Processor Interrupt Controller
2
VECTOR This vector is returned when the Interrupt Acknowledge
register is examined upon acknowledgement of the interrupt associated
with this vector.
Timer Destination Registers
This register indicates the destinations for this timer’s interrupts. Timer
interrupts, operate in the Directed delivery interrupt mode. This register
may specify multiple destinations (multicast delivery).
P1 PROCESSOR 1. The interrupt is directed to processor 1.
P0 PROCESSOR 0. The interrupt is directed to processor 0.
Offset Timer 0 - $01130
Timer 1 - $01170
Timer 2 - $011B0
Timer 3 - $011F0
Bit 3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Name TIMER DESTINATION
P1
P0
Operation RRRR
R/W
R/W
Reset $00 $00 $00 $00
0
0
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