Registers
http://www.motorola.com/computer/literature 2-23
2
Revision ID Register
REVID Revision ID. This register identifies the Raven revision level.
This register is duplicated in the PCI Configuration Registers.
General Control-Status/Feature Registers
LEND Endian Select. If set, the PPC bus is operating in little-endian
mode. The PPC address will be modified as described in the section When
PPC Devices are Little-Endian on page 2-16. When LEND is clear, the
PPC bus is operating in big-endian mode, and all data to/from PCI is
swapped as described in the section When PPC Devices are Big-Endian on
page 2-15.
Address $FEFF0004
Bit
0123456789
1
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
3
0
3
1
Name REVID
Operation RRRR
Reset $00 $03 $00 $00
Address $FEFF0008
Bit
0123456789
1
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
3
0
3
1
Name GCSR FEAT
Operation
LEND
PCIFBR
BHOG
PPCFBR
PBT1
PBT0
P64
OPIC
MID1
MID0
EXT15
EXT14
EXT13
EXT12
EXT11
EXT10
EXT09
EXT08
EXT07
EXT06
EXT05
EXT04
EXT03
EXT02
EXT01
EXT00
Reset
R/W
R
R
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Address
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1