Motorola MTX series Programmer's Reference Guide

2-74 Computer Group Literature Center Web Site
Raven PCI Host Bridge & Multi-Processor Interrupt Controller
2
On PowerPC-based systems, Interrupt Acknowledge is implemented as a
read request to a memory-mapped Interrupt Acknowledge register.
Reading the Interrupt Acknowledge register returns the interrupt vector
corresponding to the highest priority pending interrupt. Reading this
register also has the following side effects.
❏ The associated bit in the Interrupt Pending Register is cleared.
❏ Reading this register will update the In-Service register.
Reading this register without a pending interrupt will return a value of $FF
hex.
End-of-Interrupt Registers
EOI END OF INTERRUPT. There is one EOI register per processor.
EOI Code values other than 0 are currently undefined. Data values written
to this register are ignored; zero is assumed. Writing to this register signals
the end of processing for the highest priority interrupt currently in service
by the associated processor. The write operation will update the In-Service
register by retiring the highest priority interrupt. Reading this register
returns zeros.
Programming Notes
External Interrupt Service
The following summarizes how an external interrupt is serviced:
1. An external interrupt occurs.
Offset Processor 0 $200B0
Processor 1 $210B0
Bit 3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
Name EOI
Operation RRRRW
Reset $00 $00 $00 $0 $0

Motorola MTX series Specifications

General

Brand	Motorola
Model	MTX series
Category	Portable Radio
Language	English