Raven Interrupt Controller Implementation
http://www.motorola.com/computer/literature 2-75
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2. The processor state is saved in the machine status save/restore
registers. A new value is loaded into the Machine State Register
(MSR). The External Interrupt Enable bit in the new MSR (MSRee)
is set to zero. Control is transferred to the O/S external interrupt
handler.
3. The external interrupt handler calculates the address of the Interrupt
Acknowledge register for this processor (MPIC Base Address +
0x200A00 + (processor ID shifted left 12 bits)).
4. The external interrupt handler issues an Interrupt Acknowledge
request to read the interrupt vector from the MPIC. If the interrupt
vector indicates the interrupt source is the 8259, the interrupt
handler issues a second Interrupt Acknowledge request to read the
interrupt vector from the 8259. The Raven MPIC does not interact
with the vector fetch from the 8259.
5. The interrupt handler saves the processor state and other interrupt-
specific information in system memory and re-enables for external
interrupts (the MSRee bit is set to 1). Raven MPIC blocks interrupts
from sources with equal or lower priority until an End-of-Interrupt
is received for that interrupt source. Interrupts from higher priority
interrupt sources continue to be enabled. If the interrupt source was
the 8259, the interrupt handler issues an EOI request to the MPIC.
This resets the In-Service bit for the 8259 with in the Raven MPIC
and allows it to recognize higher priority interrupt requests, if any,
from the 8259. If none of the nested interrupt modes of the 8259 are
enabled, the interrupt handler issues an EOI request to the 8259.
a. The device driver interrupt service routine associated with this
interrupt vector is invoked.
b. If the interrupt source was not the 8259, the interrupt handler
issues an EOI request for this interrupt vector to the MPIC. If the
interrupt source was the 8259 and any of the nested interrupt
modes of the 8259 are enabled, the interrupt handler issues an
EOI request to the 8259.
Normally, interrupts from ISA devices are connected to the 8259
interrupt controller. ISA devices typically rely on the 8259 Interrupt
Acknowledge to flush buffers between the ISA device and system
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