Motorola MTX series Programmer's Reference Guide

3-22 Computer Group Literature Center Web Site
Falcon ECC Memory Controller Chip Set
3
Refresh/Scrub
Refresh/Scrub is done differently based on which DRAM blocks are
populated: (A and/or B) but not (C and D), or (A and/or B) and (C and/or
D).
Blocks A and/or B Present, Blocks C and D Not Present
The Falcon pair performs refresh by doing a burst of four RAS_ cycles
approximately once every 60µs. This increases to once every 30µs when
certain DRAM devices are used. (Controlled by the ram_fref bit in the
status registers.) RAS_ is asserted to both of Blocks A and B during each
of the 4 cycles. Along with RAS_, the Falcon pair also asserts CAS_ with
(OE_ then WE_) to one of the blocks during one of the four cycles. This
forms a read-modify-write which is a scrub cycle to that location.
$X3FFFFF2 $7FFFFE Upper
$X3FFFFF3 $7FFFFE Upper
$X3FFFFF4 $7FFFFE Lower
$X3FFFFF5 $7FFFFE Lower
$X3FFFFF6 $7FFFFE Lower
$X3FFFFF7 $7FFFFE Lower
$X3FFFFF8 $7FFFFF Upper
$X3FFFFF9 $7FFFFF Upper
$X3FFFFFA $7FFFFF Upper
$X3FFFFFB $7FFFFF Upper
$X3FFFFFC $7FFFFF Lower
$X3FFFFFD $7FFFFF Lower
$X3FFFFFE $7FFFFF Lower
$X3FFFFFF $7FFFFF Lower
Table 3-10. PowerPC 60x to ROM/Flash Address Mapping when ROM/Flash
is 64 Bits Wide (32 Bits per Falcon) (Continued)
PowerPC 60x A0-A31 ROM/Flash A22-A0 ROM/Flash Selected

Motorola MTX series Specifications

General

Brand	Motorola
Model	MTX series
Category	Portable Radio
Language	English