Motorola MTX series Programmer's Reference Guide

2-1
2
2Raven PCI Host Bridge & Multi-
Processor Interrupt Controller
Introduction
Overview
This chapter describes the architecture and usage of the Raven, a PowerPC
to PCI Local Bus Bridge ASIC. The Raven is intended to provide
PowerPC microprocessor compliant devices access to devices residing on
the PCI Local Bus in a very efficient manner. In the remainder of this
chapter, the PowerPC bus will be referred to as the PPC bus and the PCI
Local Bus as PCI.
No manufacturer currently has plans to support the PPC bus directly.
Therefore, some alternative I/O bus will be necessary in any PowerPC
product. This I/O bus must be robust and efficient enough to handle the
high bandwidth, burst oriented traffic required for Ethernet, SCSI,
graphics, and VMEbus interfaces.
PCI is a high performance 32-bit or 64-bit, burst mode, synchronous bus
capable of transfer rates of 132 MB/sec in 32-bit mode or 264 MB/sec in
64-bit mode using a 33 MHz clock.
Requirements
The Raven must provide a high throughput interface between multiple
PPC processors and 32/64-bit PCI local bus. It must be capable of
supporting up to two PPC processors and contain a multiprocessing
interrupt structure to efficiently distribute interrupts dynamically between
these processors.
Features
❏ PPC Bus Interface
– Direct interface to PowerPC processors.

Motorola MTX series Specifications

General

Brand	Motorola
Model	MTX series
Category	Portable Radio
Language	English