Functional Description
http://www.motorola.com/computer/literature 2-13
2
Figure 2-2. PCI Spread I/O Cycle Mapping
This CHRP compliant spread I/O mode allows each PCI device’s I/O
registers to reside on a different PPC memory page, so device drivers can
be protected from each other using memory page protection.
All I/O accesses must be performed within natural word boundaries. Any
I/O access that is not contained within a natural word boundary will result
in unpredictable operation. For example, an I/O transfer of 4 bytes starting
at address $80000010 is considered a valid transfer. An I/O transfer of 4
bytes starting at address $80000011 is considered an invalid transfer since
it crosses the natural word boundary at address $80000013/$80000014.
Generating PCI Configuration Cycles
Mechanism one (as just described above) is utilized to generate
configuration cycles. Two 32 bit PCI I/O ports at $CF8 and $CFC are used
to access PCI configuration space. One of the four PPC Slave Address
Registers is used to gain access to $CF8 and $CFC.
Note MSADD3 is initialized at reset to access PCI I/O space with an
PPC address of $80000000.
1915 9610
PPC Address + Offset
31 12 11 5 4 0
31 0
PCI Address
25 24
0 0 0 0 0 0 0
0000000
54
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