Programming Model
http://www.motorola.com/computer/literature 3-31
3
Notes
1. All shaded bit fields are reserved and read as zeros.
2. All status bits are shown in italics.
3. All control bits are shown with underline.
4. All control-and-status bits are shown with italics and underline.
FEF80048 ROW ADDRESS COL ADDRESS
FEF80050
ROM A BASE
rom_a_64
RO
M A
SIZ
rom_a_rv
rom a en
rom a we
FEF80058
ROM B BASE
rom_b_64
RO
MB
SIZ
rom_b_rv
rom b en
rom b we
FEF80060
rom_a_spd0
rom_a_spd1
rom_b_spd0
rom_b_spd1
FEF80068
dpelog
DPE_TT DPE_D
P
dpe_ckall
dpe_me
GWDP
FEF80070 DPE_A
FEF80078 DPE_D
FEF80100 CTR32
FEF80400 PR_STAT1
FEF80500 PR_STAT2
FEF88000
FEF8FFF8
EXTERNAL REGISTER SET
BIT # ---->
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Table 3-11. Register Summary (Continued)
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