Renesas H8 Series - Page 654

Appendix B Internal I/O Registers
Rev. 7.00 Mar 10, 2005 page 612 of 652
REJ09B0042-0700
TMW—Timer Mode Register W H'F8 Watchdog Timer
Note: This register is implemented on the H8/38124 Group only.
Bit
Initial value
Read/Write
7

1

6

1

5

1

3
CKS3
1
R/W
0
CKS0
1
R/W
2
CKS2
1
R/W
1
CKS1
1
R/W
4

1

Internal Clock Select
CDS3 Clock source
1
CDS2
0
CDS1
0
CDS0
0 φ/64
1001φ/128
1010φ/256
1011φ/512
1100φ/1024
1101φ/2048
1110φ/4096
1111φ/8192
0 ***On-chip oscillator
Note: Valid when WDCKS bit in PMR2 register is cleared to 0.