SBC PCD2 Series - Pcd2.W10 X, Analogue Inputs, 4 Channels, 12 Bit Resolution

Saia-Burgess Controls AG
Manual I/O-modules for PCD1 │ PCD2 series │ Document 27-600 – Release ENG09 │ 2019-05-01
5-53
I/O modules PCD1|PCD2
PCD2.W10x
5
5.8.1 PCD2.W10x, analogue inputs, 4 channels, 12 bit resolution
High-speed module for general use for recording analogue signals with a conver-
siontimeof≤30µsandaresolutionof12bits.
Module overview
PCD2.W100  4channelsforsignals0 … 10V
   Unipolar*): 0V … +10Vor–10V … 0V
   Bipolar*): –10V … +10V
   Inputresistance:>10MΩ
PCD2.W105  4channelsforsignals0 … 20mA
   Unipolar*): 0 … +20mAor-20 … 0mA
   Bipolar*): -20mA … +20mA
   Circuitresistance(Rshunt):100Ω/0.1%
   *)Unipolar-bipolar,switchablewithjumper
Technical data
Signal ranges see module overview
Galvanic separation no
Resolution (digital representation) 12bits(0 … 4095)
Measuring principle di󰀨erential
Conversion time ≤30µs
Input resistance W100:>10MΩ  W105:100Ω/0.1%
Accuracy at 25 °C
(of measured value)
W100: ± 0.1 % + ± 1 LSB bipolar
W100: ± 0.05 % + ± 1 LSB unipolar
W105: ± 0.2 % + ± 1 LSB unip/bip.
Repeating accuracy ± 1 LSB
Common mode range (CMR) W100: ± 11 V W105: ± 8 V
Common mode rejection (CMRR) > 70 dB
Temperatureerror(0 … +55°C) W100: ± 0.2 % + ± 2 LSB
W105: ± 0.3 % + ± 2 LSB
Overvoltage protection (W100) ± 60 VDC (permanent)
Overcurrent protection (W105) ± 50 mA (permanent)
Burst protection
capacitive coupling (IEC 801-4)
± 1 kV, with unshielded cables
± 2 kV, with shielded cables
Timeconstantofinputlter 3 ms
Internal current consumption:
(from +5 V bus)
45 mA
typ. 20 mA
Internal current consumption:
(from V+ bus)
15 mA
External current consumption: 0 mA
Terminals: Pluggable 10-pole screw terminal block
(4 405 4847 0), for wires up to 1.5 mm²