Agilent Technologies 93000 SOC Series User Manual

Lesson 7 – Executing the DAC Distortion Test
283
If this checkbox is enabled, the uploaded data will be
reconstructed as coherent data, that means the data will be
compressed into one signal cycle. This requires:
• You upload only data of one UTP (unit test period). One UTP is the
default capture memory contents if the test was performed under
coherent conditions.
• The total number of UTPs in the capture memory can be
determined by calculating the largest common factor of the
number of captured cycles (Mcycles) and the number of captured
points (Npoints).
In order to support coherent testing, Mcycles and Npoints must be
mutually prime (they must not have a common factor other than
one), and they must have the same ratio as Fin/Fsample (input
signal frequency divided by sampling frequency).
• You enter the number of signal cycles that have been captured into
the corresponding box.
Coherent reconstruction is supported in time domain (pts, Time/s)
and frequency domain (Freq/Hz).
Example:
The figure below shows the coherent reconstruction of a captured
sine wave. The captured waveform consists of 1024 data points
which comprise 11 signal cycles. The coherent reconstruction
compresses all 1024 data points into one cycle.

Agilent Technologies 93000 SOC Series Specifications

General

Brand	Agilent Technologies
Model	93000 SOC Series
Category	Test Equipment
Language	English