Lesson 1 – Analog Modules
85
1GHz Digitizer (1 GHz Sampler 320 Msps Digitizer)
The 1GHz Digitizer module (software identifier: WDD) is the instru-
ment that contains a 1 GHz-BW 50 Msps 12-bit sampler and a 320
Msps 160 MHz-BW12-bit digitizer.
These sampler and digitizer are used alternatively; they share the
pogo pins, input multiplexer, sequencer, waveform memory, and A/
D converter as shown in the following figure. This figure shows
two offset DACs to simplify the diagram, however actually one
offset DAC (which sets the specified DC offset voltage) is shared in
both digitizer mode and sampler mode.
The sampler mode and digitizer mode can be used alternatively
even in a testsuite of the testflow. The default setting is digitizer
mode
Block Diagram of WDD (Single-ended input routes shown with bold lines)
The WDD is a single-slot analog module installed in the testhead, and
has one digitizer/sampler core.
Mode Bandwidth Sampling Rate Resolution Waveform Memory
Digitizer mode 160 MHz 1M - 320 Msps
12 bits 4 M samples
Sampler mode 1 GHz
a
a
1 GHz bandwidth for using the pogo pin(s); C+, C-, D+, D-, C+&C-, or D+&D-.
900 MHz bandwidth for using pogo pin(s); A+, A-, B+, B-, A+&A-, or B+&B-.
1M - 50 Msps
Pogo Pin
Input Multiplexer
A+ (16/Mode1)
B– (13/Mode6)
A– (15/Mode5)
B+ (14/Mode2)
DGND
Master Clock
CCLK Stop / Sequencer Start
SYNC CLK (04)
SYNC DATA (03)
Timing
Generator
C– (11/Mode7)
D– (09/Mode8)
C+ (12/Mode3)
D+ (10/Mode4)
AGND
Conversion Clock (CCLK)
Filter
Sequencer/
Waveform
Memory
(GND for SYNC CLK)
Digitizer Mode
Sampler Mode
Input
Amp
R1 R2
R1
Offset DAC
S/H
Amp
50
50
ADC
+
-
+
-
Offset DAC
In Sampler mode,
wider bandwidth for
C+/- and D+/- pin(s)
R1: 37.5, 50, or 10k
R2: 100
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