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8331B–AVR–03/12
Atmel AVR XMEGA AU
4.5 Data Memory
The data memory contains the I/O memory, internal SRAM, optionally memory mapped
EEPROM, and external memory, if available. The data memory is organized as one continuous
memory section, as shown in Figure 4-2 on page 23.
Figure 4-2. Data memory map.
I/O memory, EEPROM, and SRAM will always have the same start addresses for all XMEGA
devices. The address space for external memory will always start at the end of internal SRAM
and end at address 0xFFFFFF.
4.6 Internal SRAM
The internal SRAM always starts at hexadecimal address 0x2000. SRAM is accessed by the
CPU using the load (LD/LDS/LDD) and store (ST/STS/STD) instructions.
4.7 EEPROM
All XMEGA devices have EEPROM for nonvolatile data storage. It is addressable in a separate
data space (default) or memory mapped and accessed in normal data space. The EEPROM
supports both byte and page access. Memory mapped EEPROM allows highly efficient
EEPROM reading and EEPROM buffer loading. When doing this, EEPROM is accessible using
load and store instructions. Memory mapped EEPROM will always start at hexadecimal address
0x1000.
I/O Memory
(Up to 4 KB)
EEPROM
(Up to 4 KB)
Internal SRAM
External Memory
(0 to 16 MB)
0x000000
0x001000
0xFFFFFF
0x002000
Start/End
Address
Data Memory
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