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Atmel AVR XMEGA AU series

Atmel AVR XMEGA AU series
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221
8331B–AVR–03/12
Atmel AVR XMEGA AU
18.3 Register Descriptions
18.3.1 CTRL – Control register
Bit 7:3 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
Bit 2:0 – PRESCALER[2:0]: Clock Prescaling factor
These bits define the prescaling factor for the RTC clock according to Table 18-1 on page 221.
Bit 76543210
+0x00 PRESCALER[2:0] CTRL
Read/Write R R R R R R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Table 18-1. Real-time counter clock prescaling factor.
PRESCALER[2:0] Group Configuration RTC Clock Prescaling
000 OFF No clock source, RTC stopped
001 DIV1 RTC clock / 1 (no prescaling)
010 DIV2 RTC clock / 2
011 DIV8 RTC clock / 8
100 DIV16 RTC clock / 16
101 DIV64 RTC clock / 64
110 DIV256 RTC clock / 256
111 DIV1024 RTC clock / 1024

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