Atmel AVR XMEGA AU series User Manual

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8331B–AVR–03/12
Atmel AVR XMEGA AU
27. EBI – External Bus Interface
27.1 Features
• Supports SRAM up to:
– 512KB using 2-port EBI
– 16MB using 3-port EBI
• Supports SDRAM up to:
– 128Mb using 3-port EBI
• Four software configurable chip selects
• Software configurable wait state insertion
• Can run from the 2x peripheral clock frequency for fast access
27.2 Overview
The External Bus Interface (EBI) is used to connect external peripherals and memory for
accessthrough the data memory space. When the EBI is enabled, data address space outside
the internal SRAM becomes available using dedicated EBI pins.
The EBI can interface external SRAM, SDRAM, and peripherals, such as LCD displays and
other memory mapped devices.
The address space for the external memory is selectable from 256 bytes (8-bit) up to 16MB (24-
bit). Various multiplexing modes for address and data lines can be selected for optimal use of
pins when more or fewer pins are available for the EBI. The complete memory will be mapped
into one linear data address space continuing from the end of the internal SRAM. Refer to ”Data
Memory” on page 22 for details.
The EBI has four chip selects, each with separate configuration. Each can be configured for
SRAM, SRAM low pin count (LPC), or SDRAM.
The EBI is clocked from the fast, 2x peripheral clock, running up to two times faster than the
CPU.
Four-bit and eight-bit SDRAM are supported, and SDRAM configurations, such as CAS latency
and refresh rate, are configurable in software.
For more details on SRAM and SDRAM, and on how these memory types are organized and
work, refer to SRAM and SDRAM-specific documentation and datasheets. This section only
contains EBI-specific details.
27.3 Chip Select
The EBI module has four chip select lines (CS0 to CS3), which can be associated with separate
address ranges. The chip selects control which memory or memory mapped external hardware
is accessed when a given memory address is issued on the EBI. Each chip select has separate
configuration, and can be configured for SRAM or SRAM low pin count (LPC). Chip select 3 can
also be configured for SDRAM.
Each chip select has a configurable base address and address size, which are used to deter-
mine the data memory address space associated with each chip select.

Atmel AVR XMEGA AU series Specifications

General

Brand	Atmel
Model	AVR XMEGA AU series
Category	Microcontrollers
Language	English