420
8331B–AVR–03/12
Atmel AVR XMEGA AU
Figure 32-8. Driving data out on the PDI_DATA using a bus keeper.
If the programmer and the PDI both drive the PDI_DATA line at the same time, drive contention
will occur, as illustrated in Figure 32-9 on page 420. Every time a bit value is kept for two or more
clock cycles, the PDI is able to verify that the correct bit value is driven on the PDI_DATA line. If
the programmer is driving the PDI_DATA line to the opposite bit value to what the PDI expects,
a collision is detected.
Figure 32-9. Drive contention and collision detection on the PDI_DATA line.
As long as the PDI transmits alternating ones and zeros, collisions cannot be detected, because
the PDI output driver will be active all the time, preventing polling of the PDI_DATA line. How-
ever, the two stop bits should always be transmitted as ones within a single frame, enabling
collision detection at least once per frame.
32.4 JTAG Physical
The JTAG physical layer handles the basic low-level serial communication over four I/O lines,
TMS, TCK, TDI, and TDO. The JTAG physical layer includes BREAK detection, parity error
detection, and parity generation. For all generic JTAG details, refer to ”IEEE 1149.1 JTAG
Boundary Scan Interface” on page 408.
32.4.1 Enabling
The JTAGEN fuse must be programmed and the JTAG disable bit in the MCU control register
must be cleared to enable the JTAG interface. This is done by default. When the JTAG PDICOM
10110
Output enable
PDI_CLK
PDI Output
0
1
PDI_DATA
PDI_CLK
PDI Output
PDI_DATA
11X01
Programmer
output
1X
Collision detect
= Collision
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