Atmel AVR XMEGA AU series

254
8331B–AVR–03/12
Atmel AVR XMEGA AU
• Bit 7:2 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 1 – TRNIF: Transaction Complete Interrupt Flag
This flag is when there is a pending packet interrupt in the FIFO.
• Bit 0 – SETUPIF: SETUP Transaction Complete Interrupt Flag
This flag is set when a SETUP transaction has completed successfully.
20.13.13 CALL – Calibration Low
CALL and CALH hold the 16-bit value, CAL. The USB PADs (D- and D+) are calibrated during
production to enable operation without requiring external components on the USB lines. The cal-
ibration value is stored in the signature row of the device, and must be read from there and
written to the CAL registers from software.
• Bit 7:0 – CAL[7:0]: PAD Calibration Low
This byte holds the eight lsbs of CAL.
20.13.14 CALH – Calibration High
• Bit 7:0 – CAL[15:8]: PAD Calibration High
This byte holds the eight msbs of CAL.
Bit 76543210
++0x3A CAL[7:0] CALL
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
+0x3B CAL[15:8] CALH
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0