341
8331B–AVR–03/12
Atmel AVR XMEGA AU
27.7.2 Three-Port EBI Configuration
When three EBI ports are available, SDRAM can be connected with a three-Port EBI configura-
tion. When this is done only four-bit data bus is available, and any chip select must be controlled
from software using a general purpose I/O pin (Pxn).
Figure 27-9. Three-Port SDRAM configuration.
27.7.3 Four-Port EBI Configuration
When four EBI ports are available, SDRAM can be connected with a three-port or four-port EBI
configuration. When a four-port configuration is used, an eight-bit data bus is available, and all
four chip selects will be available.
Figure 27-10. Four-Port SDRAM configuration.
AUTO REFRESH Refresh one row of each bank
LOAD MODE Load mode register
SELF REFRESH Activate self refresh mode
Table 27-3. Supported SDRAM commands. (Continued)
EBI SDRAM
WE
CAS/RE
RAS
DQM
CLK
CKE
BA[1:0]
Pxn
D[3:0]
A[7:0]]
WE
CAS
RAS
DQM
CLK
CKE
CS
BA[1:0]
A[7:0]
D[3:0]
A[11:8]
A[11:8]
EBI
SDRAM
WE
CAS/RE
RAS
DQM
CLK
CKE
BA[1:0]
CS[3]
D[7:0]
A[7:0]]
WE
CAS
RAS
DQM
CLK
CKE
CS
BA[1:0]
A[7:0]
D[7:0]
A[11:8]
A[11:8]