383
8331B–AVR–03/12
Atmel AVR XMEGA AU
• Bit 3:0 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
28.17.7 SCAN – Channel Scan register
Scan is enabled when COUNT is set differently than 0. This register is available only for ADC
channel 0.
• Bit 7:4 – OFFSET[3:0]: Positive MUX Setting Offset
The channel scan is enabled when COUNT != 0 and this register contains the offset for the next
input source to be converted on ADC channel 0 (CH0). The actual MUX setting for positive input
equals MUXPOS + OFFSET. The value is incremented after each conversion until it reaches the
maximum value given by COUNT. When OFFSET is equal to COUNT, OFFSET will be cleared
on the next conversion.
• Bit 3:0 – COUNT[3:0]: Number of Input Channels Included in Scan
This register gives the number of input sources included in the channel scan. The number of
input sources included is COUNT + 1. The input channels included are the range from
MUXPOS + OFFSET to MUXPOS + OFFSET + COUNT.
Bit 76543210
+0x06 OFFSET[3:0] COUNT[3:0] SCAN
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
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