Data General Service ECLIPSE MV/7800 - Microsequencer (Useq)

3.2.8 Microsequencer (uSEQ)
The uSEQ performs assembly-language instruction decoding and sequencing of control store that provides the
,— control signals used by the CPU and FPU to execute an instruction. The basic functional elements of the uSEQ
are the IR pipeline, which receives instructions from memory and presents them to the decode logic; the decode
logic, which decodes the instructions; and the sequencing logic, which generates the proper sequence of address
for the control store. Physically, the uSEQ is a single VLSI chip. Figure 3-6 shows the major functional elements
of the uSEQ:
•
Instruction register (IR) pipeline
•
Decode logic
•
Sequencing logic
•
Control store
TO/FROM
SYSTEM MEMORY
S-BUS
(32 BITS)
S-BUS
INTERFACE
INIOMMI• MNOMM.MMIM Al
■
DECODE LOGIC
INSTRUCTION
REGISTER

FPLA 
SPLA
PIPELINE
L
IMMIN11. ■
• ■■
LIONDMIMM
MICROADDRESS BUS
(16 BITS)
CONTROL STORE
SEQUENCING LOGIC
WRITABLE
CONTROL
STORE
MICROCONTROL BUS
(24 BITS)

_
TO/FROM
FS-12751

CONTROL STORE
Figure 3-6. Microsequencer, Block Diagram
DGC CONFIDENTIAL - INTERNAL USE ONLY

3-13 
043-003621