3 Programming the Analyzer
STATus Subsystem
Preset 0
Min 0
Max 32767
Status Bits/OPC
dependencies
Sequential command
Initial S/W Revision Prior to A.02.00
Questionable Integrity Uncalibrated Positive Transition
This command determines which bits in the Questionable Integrity Uncalibrated Condition register will set
the corresponding bit in the Questionable Integrity Uncalibrated Event register when the condition register
bit has a positive transition (0 to 1). The variable <integer> is the sum of the decimal values of the bits that
you want to enable.
Mode All
Remote Command
:STATus:QUEStionable:INTegrity:UNCalibrated:PTRansition <integer>
:STATus:QUEStionable:INTegrity:UNCalibrated:PTRansition?
Example STAT:QUES:INT:UNC:PTR 1 Oversweep (Meas Uncal) occurred will be reported to the Integrity
Summary of the Status Questionable register.
Preset 32767
Min 0
Max 32767
Status Bits/OPC
dependencies
Sequential command
Initial S/W Revision Prior to A.02.00
Questionable Power Register
"Questionable Power Condition " on page 134
"Questionable Power Enable " on page 135
"Questionable Power Event Query " on page 135
"Questionable Power Negative Transition " on page 136
"Questionable Power Positive Transition " on page 136
Questionable Power Condition
This query returns the decimal value of the sum of the bits in the Questionable Power Condition register.
The data in this register is continuously updated and reflects the current conditions.
134 EMI Receiver Mode Reference
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