xii
DRAM Attributes Register ....................................................................... 3-35
DRAM Base Register................................................................................ 3-37
CLK Frequency Register........................................................................... 3-37
ECC Control Register ...............................................................................3-38
Error Logger Register ...............................................................................3-41
Error_Address Register............................................................................. 3-44
Scrub/Refresh Register.............................................................................. 3-44
Refresh/Scrub Address Register ...............................................................3-45
ROM A Base/Size Register.......................................................................3-46
ROM B Base/Size Register....................................................................... 3-50
ROM Speed Control Register ...................................................................3-52
Data Parity Error Logger Register ............................................................ 3-53
Data Parity Error Address Register...........................................................3-55
Data Parity Error Data Register ................................................................3-55
32-Bit Counter........................................................................................... 3-56
Power-Up Reset Status Register 1 ............................................................ 3-56
Power-Up Reset Status Register 2 ............................................................ 3-57
External Register Set................................................................................. 3-57
Software Considerations.......................................................................................... 3-58
Parity Checking on the PowerPC Bus.............................................................. 3-58
Programming ROM/Flash Devices .................................................................. 3-58
Writing to the Control Registers.......................................................................3-58
Sizing DRAM................................................................................................... 3-59
ECC Codes .............................................................................................................. 3-62
Data Paths................................................................................................................ 3-64
CHAPTER 4 Programming Details
Introduction ............................................................................................................... 4-1
PCI Device Addressing .............................................................................................4-1
PCI Arbitration ..........................................................................................................4-2
Interrupt Handling .....................................................................................................4-3
Raven MPIC....................................................................................................... 4-4
8259 Interrupts ...................................................................................................4-5
ISA DMA Channels...................................................................................................4-8
Exceptions .................................................................................................................4-8
Sources of Reset .................................................................................................4-8
Soft Reset ...........................................................................................................4-9
Error Notification and Handling.........................................................................4-9
Endian Issues........................................................................................................... 4-11
Processor/Memory Domain.............................................................................. 4-12