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List of Figures
Figure 1-1. MTX Series System Block Diagram.......................................................1-4
Figure 2-1. Raven Block Diagram.............................................................................2-3
Figure 2-2. PCI Spread I/O Cycle Mapping ............................................................2-13
Figure 2-3. Big- to Little-Endian Data Swap...........................................................2-15
Figure 2-4. Raven MPIC Block Diagram ................................................................2-53
Figure 3-1. Falcon Pair Used with DRAM in a System ............................................3-3
Figure 3-2. Falcon Internal Data Paths (Simplified)..................................................3-4
Figure 3-3. Overall DRAM Connections...................................................................3-5
Figure 3-4. Data Path for Reads from the Falcon Internal CSRs.............................3-25
Figure 3-5. Data Path for Writes to the Falcon Internal CSRs.................................3-26
Figure 3-6. Memory Map for Byte Reads to the CSR .............................................3-27
Figure 3-7. Memory Map for Byte Writes to the Internal Register Set ...................3-28
Figure 3-8. Memory Map for 4-Byte Reads to the CSR..........................................3-29
Figure 3-9. Memory Map for 4-Byte Writes to the Internal Register Set................3-29
Figure 3-10. PowerPC Data to DRAM Data Correspondence.................................3-65
Figure 4-1. MTX Series Interrupt Architecture .........................................................4-3
Figure 4-2. PIB Interrupt Handler Block Diagram ....................................................4-6
Figure 4-3. Big-Endian Mode..................................................................................4-11
Figure 4-4. Little-Endian Mode...............................................................................4-12
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