Programming Model
http://www.motorola.com/computer/literature 3-39
3
So, for example, the check-bits that correspond to the 64 bits of data found
in normal mode (rwcb=0) at $00001000-$00001003 and $00001008-
$0000100b are written and read in check-bit mode (rwcb=1) at location
$00001003.
Note If test software wishes to force a single-bit error to a location
using the rwcb function, the scrubber may correct the location
before the test software gets a chance to check for the single-bit
error. This can be avoided by disabling scrub writes. Also note
that writing bad check-bits can set the elog bit in the Error Logger
Register. The writing of check-bits causes the Falcon to perform
a read-modify-write to DRAM. If the location to which check-
bits are being written has a single- or double-bit error, data in the
location may be altered by the write check-bits operation. To
avoid this, it is recommended that the derc bit also be set while
the rwcb bit is set. A possible sequence for performing read-write
check-bits is as follows:
0 1 2 3 4 5 6 7
32 bits
048C
Normal
View of
Data
(rwcb=0)
Check-bit
View
(rwcb=1
Connected to
Upper Falcon
Connected to
Lower Falcon
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