NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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The RF data buffer consists of a dedicated RFM state machine and a 256-bit data buffer.
The RF data buffer is loaded with whatever data pattern the user software creates. The
number of data bits to be sent is selected by the FRM[7:0] control bits. The control logic
is triggered by the SEND control bit when it is time to transmit the data which is sent to
the RF stage after being encoded as either Manchester, Bi-Phase or NRZ data according
to the method selected by the CODE[1:0] bits.
Before the data can be transmitted the RFM control logic enables the external crystal
oscillator and phase-locked-loop to initialize before the RF output stage can begin
transmission.
The external crystal connected to the X0 and XI pins provides the carrier frequency as
well as the data rate clock needed for the data rates associated with the OOK or FSK
modulation. Therefore, the tolerance on the data rate will depend on the characteristics of
the external crystal.
Once the data buffer is emptied the data transfer stops; the RF output stage is turned off;
and the SEND control bit is cleared and an interrupt of the MCU may be generated to
wake it from the STOP1 mode. The user can test that the transmission has completed by
reading back the state of the SEND control bit or the RFIF status bit.
There is also the option to send the same data frame from 1 to 16 times with interlaced
time intervals when the RF transmitter PA output stage is off. If multiple frames of data
are to be transmitted within a datagram the spacing before the first frame and between
subsequent frames can be controlled by the RFM state machine in several ways:
1. Use of a programmable timer (random, base time, time adder).
2. No time delays.
In addition, the RFM crystal oscillator, VCO and PLL can be turned off during any
interframe timing by use of the IFPD bit.
When using the data buffer mode the user’s software should not change any bits in the
RFM registers after the SEND has been set and the transmission is still in progress.
Changing RFM register contents during a transmission can lead to data faults or errors.
10.16.1.2 MCU direct mode
When the CODE[1:0] bits are both set the encoding is controlled directly by the MCU
where the data to the RF output depends on the state of the DATA bit and the selected
modulation scheme. In this mode the user software must control the RF output stage to
power up (using the SEND control bit), WAIT for the RF output stage to stabilize (monitor
the RCTS status bit) and clock the DATA to the RF output stage. In this mode the data
rate and its stability will depend on the internal HFO oscillator.
Any transfers of data from the MCU will use the DATA bit which will be reflected as
modulated data on the RF pin once the RF output stage is set up to transmit. The
maximum data rate in this mode will depend on the complexity of the user software and
the MCU clock rate.
The POL bit in this case simply inverts the state of the DATA bit before it drives the RF
output stage.
The accuracy of the data rate in the MCU direct mode is directly dependent on the HFO
accuracy.
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