NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
173 / 205
aaa-031077
WRITE TO FCDIV
(1)
START
FLASH BURST
PROGRAM FLOW
FACCERR?
FCBEF?
0
CLEAR ERROR
Note 1: Required only once after reset.
Note 2:
DONE
FCCF?
ERROR EXIT
0
1
1
0
1
no
yes
WRITE COMMAND ($25) TO FCMD
WRITE 1 TO FCBEF
TO LAUNCH COMMAND
AND CLEAR FCBEF
(2)
NEW BURST COMMAND?
no
yes
WRITE TO FLASH
TO BUFFER ADDRESS AND DATA
FPVIOL
Wait at least four bus cycles
before checking FCBEF or FCCF.
OR
FACCERR?
Figure 56. FMC burst program flow diagram
10.24.5 FMC memory access errors
An access error occurs whenever the command execution protocol is violated. Any of the
following specific actions cause the access error flag (FACCERR) in FSTAT to be set.
FACCERR must be cleared by writing a 1 to FACCERR in FSTAT before any command
can be processed.
• Writing to a FLASH address before the internal FLASH clock frequency has been set
by writing to the FCDIV register
To Next Page
Loading...