NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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– Memory access commands
– Memory-access-with-status commands
– BDC register access commands
– The BACKGROUND command
• ACTIVE BACKGROUND commands, which can only be executed while the MCU
is in ACTIVE BACKGROUND mode. ACTIVE BACKGROUND commands include
commands to:
– Read or write CPU registers
– Trace one user program instruction at a time
– Leave ACTIVE BACKGROUND mode to return to the user’s application program
(GO)
The ACTIVE BACKGROUND mode is used to program a boot loader or user application
program into the FLASH program memory before the MCU is operated in RUN mode for
the first time. When the NTM88 is shipped from the NXP factory, the FLASH program
memory is erased by default (unless specifically requested otherwise) so there is no
program that could be executed in RUN mode until the FLASH memory is initially
programmed.
The ACTIVE BACKGROUND mode can also be used to erase and reprogram the
FLASH memory after it has been previously programmed.
10.8.5 STOP Modes
One of two stop modes are entered upon execution of a STOP instruction when the
STOPE bit in the system option register is set. In all STOP modes, all internal clocks
are halted except for the low frequency 1 kHz oscillator (LFO) which runs continuously
whenever power is applied to the V
DD
and V
SS
pins. If the STOPE bit is not set when
the CPU executes a STOP instruction, the MCU will not enter any of the STOP modes
and an illegal opcode reset is forced. The STOP modes are selected by setting the
appropriate bits in SPMSC2. Table 20 summarizes the behavior of the MCU in each of
the STOP1 and STOP4 modes.
10.8.5.1 STOP1 Mode
The STOP1 mode provides the lowest possible standby power consumption by causing
the internal circuitry of the MCU to be powered down.
When the MCU is in STOP1 mode, all internal circuits that are powered from the voltage
regulator are turned off. The voltage regulator is in a low-power standby state. STOP1 is
exited by asserting either a reset or an interrupt function to the MCU.
Entering STOP1 mode automatically asserts LVD. STOP1 cannot be exited until the V
DD
is greater than V
LVDH
or V
LV/DL
rising (V
DD
must rise above the LVI re-arm voltage).
Upon wake-up from STOP1 mode, the MCU will start up as from a power-on reset (POR)
by taking the reset vector.
Note: If there are any pending interrupts that have yet to be serviced, then the device
will not go into the STOP1 mode. Be certain that all interrupt flags have been cleared
before entry to STOP1 mode.
10.8.5.2 STOP4 LVD enabled in STOP mode
The LVD system is capable of generating either an interrupt or a reset when the supply
voltage drops below the LVD voltage. If the LVD is enabled by setting the LVDE and the
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