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NXP Semiconductors UM11227 - Tab. 133. ADC Status and Control 2 Register (ADSC2) (Address $0031); Tab. 134. ADSC2 Register Field Descriptions; ADC Status and Control 2 Register (ADSC2)

NXP Semiconductors UM11227
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NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
133 / 205
ADCH[4:0] Channel Signal name Description
01001 AD9 ipp_vssa grounded
01010 AD10 ipp_vssa grounded
01011 AD11 ipp_vssa grounded
01100 AD12 ipp_vssa grounded
01101 AD13 ipp_vssa grounded
01110 AD14 ipp_vssa grounded
01111 AD15 ipp_vssa grounded
10000 AD16 ipp_vssa grounded
10001 AD17 ipp_vssa grounded
10010 AD18 ipp_vssa grounded
10011 AD19 ipp_vssa grounded
10100 AD20 ipp_vssa grounded
10101 AD21 ipp_vssa grounded
10110 AD22 ipp_vssa grounded
10111 AD23 ipp_vssa grounded
11000 AD24 pmc_driver_vdd 2.5 V unswitched digital power supply
11001 AD25 pmc_driver_vdd_sw 2.5 V switched digital power supply
11010 AD26 pmc_driver_vdda_sw 2.5 V switched analog power supply
11011 AD27 ipp_vssa grounded
11100 AD28 VREFH ADC high reference voltage
11101 AD29 VREFH ADC high reference voltage
11110 AD30 VREFL ADC low reference voltage
11111 -- -- Select to disable ADC
10.17.1.2 ADC status and control 2 register (ADSC2)
Table 133. ADC status and control 2 register (ADSC2) (address $0031)
Bit 7 6 5 4 3 2 1 0
R ADACT 0 0
W
ADTRG ACFE ACFGT
REFSEL1 REFSEL0
Reset ($00) 0 0 0 0 0 0 0 0
Table 134. ADSC2 register field descriptions
Field Description
7
ADACT
ADACT – SAR active
The ADACT bit is a read-only bit that indicates that the SAR logic is active and a conversion is in progress.
0 = SAR is not active; Result of Reset
1 = SAR is active

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