NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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Table 142. ADC register field descriptions
Field Description
7
ADLPC
ADLPC – Low Power Conversion
The ADLPC bit enables a low power conversion option.
0 = Normal power selection (improved noise); Result of Reset
1 = Low power option selected
6:5
ADIV[1:0]
ADIV[1:0] – ADC Clock divide ratio
The 2 bits ADIV[1:0] select the clock divide ratio:
0 0 = divide by 1; Result of Reset
0 1 = divide by 2
1 0 = divide by 4
1 1 = divide by 8
4
ADSLMP
ADSLMP – Long or Short sample selection
The ADLSMP bit selects between long and short sample during conversions.
0 = Short sample is selected; Result of Reset
1 = Long sample is selected
3:2
MODE[1:0]
MODE[1:0] – Mode control
The two bits MODE[1:0] select the resolution of the converter
0 0 = 8-bit; Result of Reset
0 1 = 12-bit
1 0 = 10-bit
1 1 = 10-bit
1:0
ADICLK[1:0]
ADICLK[1:0] – ADC Clock Source Selection
The two bits ADICLK[1:0] select the clock source for the ADC during conversions:
0 0 = bus clock; Result of Reset
0 1 = bus clock divide by 2
1 0 = off-chip clock
1 1 = internal asynchronous clock
10.17.1.6 Port pin control register
Table 143. Port pin control register (address $0037)
Bit 7 6 5 4 3 2 1 0
R 0 0 0 0 0 0
W — — —
ADPC4 ADPC3
— — —
Reset ($00) 0 0 0 0 0 0 0 0
Table 144. Port pint control register field descriptions
Field Description
4
ADPC4
The ADPCTL1 register allows control of the port I/O pin for use as analog inputs. When asserted, the ADC
requests control of the pad and disables the default buffers and pull-up / -down.
ADPC4 - Connects PTB1 to ADC MUX channel 4
0 = default PTB1 port operation, Result of Reset
1 = PTB1 connected to ADC MUX channel 4
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