NXP Semiconductors UM11227 - Tab. 125. RFTX0: RFTX31 Register Field Descriptions; Tab. 126. RFM EOM, PLL and PA Control Register (EPR) (Address $1860); Tab. 127. EPR Register Field Descriptions; RFM EOM, PLL and PA Control Register (EPR)

NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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Bit 7 6 5 4 3 2 1 0
R
W
RFTXD247 RFTXD246 RFTXD245 RFTXD244 RFTXD243 RFTXD242 RFTXD241 RFTXD240
Reset x x x x x x x x
Bit 7 6 5 4 3 2 1 0
R
W
RFTXD255 RFTXD254 RFTXD253 RFTXD252 RFTXD251 RFTXD250 RFTXD249 RFTXD248
Reset x x x x x x x x
Table 125. RFTX0 : RFTX31 register field descriptions
Field Description
0:255
RFTXD[0:255]
The RFTX0 through RFTX31 registers contain 256 read/write bits for the RFM to use when outputting
data as described in Table 124. These bits are unaffected by any reset. The data buffer is unloaded
to the RF output starting with the least significant bit (RFTXD0) in the least significant byte ($183C) up
through the most significant bit (RFTXD255) in the most significant byte ($185B). This is often referred to
as “little-endian” data ordering. Result of reset may be random values.
10.16.11.11 RFM EOM, PLL and PA control register (EPR)
Table 126. RFM EOM, PLL and PA control register (EPR) (address $1860)
Bit 7 6 5 4 3 2 1 0
R
W
EOM PLL_LPF2 PLL_LPF1 PLL_LPF0 reserved reserved
PA_
SLOPE1
PA_
SLOPE0
Reset ($33) 0 0 1 1 0 0 1 1
Table 127. EPR register field descriptions
Field Description
7
EOM
EOM – RF Transmit End Of Message Flag
The EOM control bit selects whether there will be two data bit times of data 1 carrier state at the end of each
datagram. The EOM control bit is cleared by an RFMRST.
0 = EOM bit times not added; Result of Reset
1 = EOM bit times added.
6:4
PLL_
LPF[2:0]
PLL_LPF[2:0] – Phase Lock Loop Low Pass Filter Selection
The 3 PLL_LPF[3:0] read/write bits select the PLL low pass filter. A reset sets these bits to 0 1 1.
1:0
PA_
SLOPE[1:0]
PA_SLOPE[1:0] – Power Amp Slope Control
The two bits PA_SLOPE[1:0] selects the slope of the RFM PA output. These bits are set to 1 1 by the
RFMRST signal.
0 0 = Set OOK data slope to 0.3 µs
0 1 = Set OOK data slope to 3.0 µs
1 0 = Set OOK data slope to 6.0 µs
1 1 = Set OOK data slope to 9.0 µs; Result of Reset