NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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10.17.1 ADC register descriptions
10.17.1.1 ADC status and control 1 register (ADSC1)
Table 130. ADC status and control 1 register (ADSC1) (address $0030)
Bit 7 6 5 4 3 2 1 0
R COCO
W —
AIEN ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Reset ($1F) 0 0 0 1 1 1 1 1
Table 131. ADSC1 register field descriptions
Field Description
7
COCO
COCO – Conversion Complete
The COCO flag bit is implemented as read-only and indicates a conversion is complete and conversion data
is available in the ADRH and ADRL registers.
0 = Conversion is not complete; Result of Reset
1 = Conversion is complete
6
AIEN
AIEN – ADC Interrupt Enable
The AIEN bit allows system-level interrupt requests to be generated when the COCO bit is set.
0 = ADC interrupt is disabled; Result of Reset
1 = ADC interrupt is enabled
5
ADCO
ADCO – Single or Continuous Conversions
The ADCO bit selects between single conversions and continuous conversions.
0 = Single conversion selected; Result of Reset
1 = Continuous conversions selected
4:0
ADCH[4:0]
ADCH[4:0] – ADC channel selection
The ADCH[4:0] field selects the analog channel to be converted. All other possible values of ADCH[4:0] are
valid channel values and result in conversion on 1 of the 28 possible channels, the selected reference high,
or the selected reference low.
1 1 1 1 1 = Result of Reset, and disables the ADC.
Table 132. ADCH valid channel values
ADCH[4:0] Channel Signal name Description
00000 AD0 smi_vout_to_adc SMI output
00001 AD1 adc_temp_sense_out Temperature sensor
00010 AD2 pmc_1p2_vref 1.2 V VREF internal band gap
00011 AD3 ipp_inouta_ptb<0> PTB0 external pin
00100 AD4 ipp_inouta_ptb<1> PTB1 external pin
00101 AD5 ipp_vreg 1.8 V VREG RF analog regulator output
00110 AD6 atb0 Analog test bus 0
00111 AD7 atb1 Analog test bus 1
01000 AD8 ipp_vssa grounded