NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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it needs to periodically listen for LF messages, perform Manchester decoding, verify the
message telegram, and assemble incoming data into 8-bit bytes. The LFR does not wake
the MCU unless a valid message is being received and a data byte is ready to be read.
The LFR cycles between an off state, where everything is disabled, and an on state,
where it listens for a carrier signal. The on time is controlled by LFONTM[3:0] control bits
in the LFCTL2 register. The time between the start of each sample on time is controlled
by LFSTM[3:0] control bits in the LFCTL2 register. Even lower duty cycles can be
achieved by using the MCU to wake once per second and maintain a software counter
to delay for an arbitrarily long time before enabling the LFR to perform a series of carrier
detect cycles.
Within the LFR, circuits remain disabled until they are needed. When the LFR is listening
for a carrier signal, only a 1 kHz clock source, a portion of the input amplifier and a
periodic auto-zero are running. After a carrier signal is detected, with high enough
amplitude, frequency, and duration the LFRO oscillator is enabled so the LFR can begin
to decode the incoming information.
The LFR module has a power up settling time of 2-LFO period before any active
operations. In the ON/OFF cycle, those 2 ms are hidden in the sampling time during the
off time.
10.15.4 Input amplifier
The LFR module receives LF modulated signals through a dedicated differential pair of
inputs which is connected to an external coil. The enable control (LFEN) allows the user
to enable the LF input depending on the application requirements. The SENS[1:0] bits
in the LFCTL1 register allows the user to select one of two input sensitivity thresholds
which determines the signal level required before the input carrier will be detected. The
sensitivity setting is used during carrier detection but does not affect reception after
the carrier has been detected. When the CARMOD bit is cleared, after a carrier with
sufficient amplitude, frequency, and duration has been detected the output stage of the
amplifier is turned on to allow data reception.
10.15.5 LFR data mode states
The modes of operation the LFR state machine will sequence as shown in Figure 20.
10.15.6 Carrier detect
Carrier detection includes a check for a certain number of edges on a signal that is
greater than the input sensitivity threshold. During the check for carrier edges, only the
1 kHz low frequency oscillator (LFO) clock source is running so power consumption
remains very low.
During carrier detection the incoming signal is amplified and passed through a sensitivity
threshold comparator. The SENS[1:0] bits in the LFCTL1 register selects two levels
of sensitivity and determines the signal amplitude that is needed to allow edges to be
seen at the output of the sensitivity threshold comparator. When a carrier is above this
threshold, a block is powered on and validates the carrier. This frequency, and duration
check function can be disabled by clearing the VALEN bit. If VALEN is set, the block
checks for the carrier duration and the carrier frequency. The time needed to validate
a carrier is programmed by the LFCDTM register. The carrier frequency should be
125 kHz. If the signal above the threshold is not within the frequency range or not present
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