NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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10.22 System integration module (SIM)
The SIM_908SZK16 is a chip-specific module targeted for integration into the
HC9S08SZK16 MCU. The SIM_908SZK16 is partitioned into many functional blocks. The
SIM is divided into IPBI (IP Bus Interface), COP (Computer Operating Properly), BEC
(Background Entry Controller), OMC (Operating Mode Controller), SPRC (Stop, POR,
and Reset Controller), RCG (Registers and Clock Gating), and GL (Glue Logic) blocks.
The SIM performs the following functions:
• Provides the interface between the S08 bus and the IPbus
• Controls system resets from internal and external sources.
• Computer Operating Properly (COP) timer with 2 selectable clock sources and 8
selectable timeout periods for each clock source.
• Selectable Bus clock divisor to be 2, 4, 8 and 16.
• Supplies system clocks based on either internal clock source or external clock inputs.
• Controls POR, low power, and Stop mode events.
• Generates a synchronous fixed frequency enable signal.
• Detects operating mode from single-pin in user operation.
• Supplies mode dependent signals for scan and functional device testing.
The SIM operates by the following modes:
• Run
• Stop
– Controls System level STOP entry and exit sequences.
– Disable the system clocks.
– Disable the internal voltage regulator and internal clock source.
– Controls the stop exit sequence due to asynchronous detection of interrupt sources
or asynchronous external reset.
• Background Debug Mode (BDM)
– The Computer Operating Properly (COP) timer is suspended.
• Reset
– Detect reset and perform a controlled exit from reset.
– Disable clock generation after extended assertion of the RST_B pin.
– Enable mode capture logic.
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