NXP Semiconductors UM11227 - Tab. 182. PMCSC3 Register Field Descriptions; Flash Memory Controller (FMC) Module; Flash Controller General Items

NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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Table 182. PMCSC3 register field descriptions
Field Description
7
LVWF
LVWF – Low Voltage Warning Flag
The LVWF bit indicates the Low Voltage Warning status if LVDE is set.
0 = Low voltage warning not present; Result of power-on reset; Existing state retained from resets of
STOP1 exit, low voltage detection, external pin, COP, PWU, illegal opcode, illegal address, soft reset, and
back-ground debugger.
1 = Low voltage warning is present or was present.
6
LVWACK
LVWACK – LVW Acknowledge
Writing a logic 1 to LVWACK clears LVWF to a logic 0 if a low voltage warning is not present.
0 = LVW not acknowledged; Result of Reset
1 = LVW acknowledged.
5
LVDV
LVDV – Low Voltage Detect Voltage Select
The LVDV bit selects the LVD trip point voltage (VLVD). When double trip points are selected during chip
integration, the selection below (high and low) is available, otherwise a single trip point, VLVDH is selected
(VLVD = VLVDH).
0 = VLVDL selected (VLVD = VLVDL); Result of power-on reset; Existing state retained from resets of
STOP1 exit, low voltage detection, external pin, COP, PWU, illegal opcode, illegal address, soft reset, and
back-ground debugger.
1 = VLVDH selected (VLVD = VLVDH).
4
LVWV
LVWV – Low Voltage Warning Voltage Select
The LVWV bit selects the low voltage warning detection voltage if LVDE is set. When double trip points are
selected during chip integration, the selection below (high and low) is available, otherwise a single trip point,
VLVDH is selected (VLVD = VLVDH).
0 = VLVDL selected (VLVD = VLVDL); Result of power-on reset; Existing state retained from resets of
STOP1 exit, low voltage detection, external pin, COP, PWU, illegal opcode, illegal address, soft reset, and
back-ground debugger.
1 = VLVDH selected (VLVD = VLVDH).
10.24 Flash memory controller (FMC) module
10.24.1 Flash controller general items
The FLASH module has nine 8-bit registers in the high-page register space, and three
locations in the nonvolatile register space in FLASH memory which are copied into three
corresponding high-page control registers at reset. There is also an 8-byte comparison
key in FLASH memory. An NXP Semiconductor-provided equate or header file normally
is used to translate these names into the appropriate absolute addresses.
FLASH memory block provides:
• User Program FLASH Size — 8192 bytes (16 pages of 512 bytes each)
• Single power supply program and erase
• Command interface for fast program and erase operation
• Up to 100,000 program/erase cycles at typical voltage and temperature
• Flexible block protection
• Security feature for FLASH and RAM
• Auto power-down for low-frequency read accesses