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NXP Semiconductors UM11227 - Tab. 101. Frame Number Interval Times; RFM in STOP1 Mode; Data Encoding; Manchester Encoding

NXP Semiconductors UM11227
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NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
111 / 205
Table 101. Frame number interval times
Nominal frame number
time interval added (ms)
Value of
FNUM[3:0]
Number
of frames
Frame
interval where
time added
Minimum Maximum
0 1 None n/a n/a
1 2 1 - 2 1 63
2 3 2 - 3 2 126
3 4 3 - 4 3 189
4 5 4 - 5 4 252
5 6 5 - 6 5 315
6 7 6 - 7 6 378
7 8 7 - 8 7 441
8 9 8 - 9 8 504
9 10 9 - 10 9 567
10 11 10 - 11 10 630
11 12 11 - 12 11 693
12 13 12 - 13 12 756
13 14 13 - 14 13 819
14 15 14 - 15 14 882
15 16 15 - 16 15 945
10.16.4 RFM in STOP1 mode
The entire RF transmitter digital section can remain powered up, if enabled by the RFEN
bit (see Section 10.13 "Timer pulse-width module"), when the MCU goes into the STOP1
mode.
10.16.5 Data encoding
The CODE[1:0] control bits select either Manchester, Bi-Phase, NRZ or MCU direct data
encoding of each data bit being transferred from the RF data buffer to the RF output
stage. Further, the polarity of the selected encoding method can be inverted using the
POL control bit.
10.16.5.1 Manchester encoding
When the CODE[1:0] bits are both clear the data is Manchester encoded format, with
data transmitted as a transition in voltage occurring in the middle of the bit time. The
polarity of this transition is selected by the POL bit. When the POL bit is cleared, then a
logical LOW is defined as an increase in signal in the middle of a bit time and a logical
HIGH is defined as a decrease in signal in the middle of a bit time as shown in Figure 34.
When the POL bit is set, then a logical LOW is defined as a decrease in signal in the
middle of a bit time and a logical HIGH is defined as an increase in signal in the middle of
a bit time as shown in Figure 35. Since there is always a transition in the middle of the bit
time there must also be a transition at the start of a bit time if consecutive "1" or "0" data
are present.

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