NXP Semiconductors UM11227 - PMC Low Voltage Detection Transitions; PMC Register Descriptions; PMC Real-Time-Interrupt Status and Control Register (SRTISC)

NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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10.23.2 PMC low voltage detection transitions
aaa-031075
POR Release
POR Rearm
LVD Off
pmc_lvds negated
LVDS bit negated
PMCSCI retains state
power saving
LVD On
Note: V
LVD
depends on LVDV configuration
reset I
(LVDE STOP)
LVDE I
(LVDSE STOP)
PDC_wakeup_b
& Power Down
pmc_lvds negated
LVDS bit negated
PMCSCI retains state
Detected
LVDRE
pmc_lvds asserted
LVDF & LVDS bits set
Figure 54. Power management controller low voltage detection transitions state diagram
10.23.3 PMC register descriptions
10.23.3.1 PMC real-time-interrupt status and control register (SRTISC)
The SRTISC register contains the status and control bits associated with the PMC real-
time interrupt function. Note: Exit from POR or STOP1 will reset all SRTISC register
bits to default $00. The interrupt from RTI operates from all power modes, however the
RTIF flag will not be set and the interrupt service routine will not execute if the RTI is
configured and STOP1 mode entered. RTIF flag and the interrupt service routine execute
if in Run mode or if STOP4 is entered. This means if the RTI is initialized and then the
user application enters STOP1, the exit of STOP1 due to RTI will have to be derived by
means other than query of the RTIF flag. An example might be user application setting
of a bit in a PARAM register prior to initializing the RTI, then entering STOP1. Upon the
wake-up, query the PARAM register bit and if set, indicates that RTI had been the cause
of the wake-up.