NXP Semiconductors UM11227 - LF Receiver Module Register Descriptions; 1 LF Control 1 Register (LFCTL1)

NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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options. It is good practice to clear the flags in the LFS register before enabling interrupt
sources in order to avoid any immediate interrupt requests.
10.15.17 LF receiver module register descriptions
10.15.17.1 LF control 1 register (LFCTL1)
Table 72. LF control 1 register (LFCTL1) (address $0020)
Bit 7 6 5 4 3 2 1 0
R 0 0
W
LFEN
SRES
CARMOD
—
IDSEL1 IDSEL2 SENS1 SENS0
Reset U U U U U U U U
POR ($) 0 0 0 0 0 0 0 0
LFR Soft
reset
0 U 0 0 0 0 0 0
Table 73. LFCTL1 register field descriptions
Field Description
7
LFEN
LFEN – LF Block Enable
This read-write control bit is used to enable or disable the LF receiver. Once this bit is set the LFR will
go through a power-up sequence that starts on the next rising edge of the LFO clock. The first complete
cycle of the LFO is used to power up the LFR circuits. Following this startup time the auto-zero sequence is
performed for 64 µs and then the LFR is ready to receive signals.
0 = LF receiver in standby; Result of power on or LFR reset. Existing state remains after all other reset
types.
1 = LF receiver active
6
SRES
SRES- Soft Reset of LF Block This read/write bit controls the soft reset of the LFR. The bit is self-reset and
always reads as a logical zero.
0 = Reset completed
1 = Start a soft reset.
5
CARMOD
CARMOD – Carrier Mode This read/write control bit selects the basic operating mode for the LFR.
0 = Data receive mode; Result of power on or LFR reset. Existing state remains after all other reset types.
1 = Carrier detect mode - wake the MCU when a carrier signal is detected if LFCDIE is set.
3:2
IDSEL[1:0]
IDSEL[1:0] – Wake-up ID Selection
The two bits IDSEL[1:0] selects the existence and length of the wake-up ID. Reset clears these bits.
0 0 = No ID expected; Result of power on or LFR reset. Existing state remains after all other reset types.
0 1 = 8-bit ID based on the contents of the LFIDL register
1 0 = 16-bit ID based on the contents of the LFIDH and LFIDL registers
1 1 = 8-bit ID matches the contents of either the LFIDH or LFIDL registers