NXP Semiconductors UM11227 - Tab. 155. ISD[3:0]; Parameter Registers (PARAM0 to PARAM63)

NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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SP[3:0] Number of MFO Clock Cycles ~T
SP
Nom. Sample Per. (us)
0110 32 256
0111 40 320
1000 51 408
1001 64 512
1010 81 648
1011 102 816
1100 128 1024
1101 161 1288
1110 203 1624
1111 256 2048
Table 155. ISD[3:0]
ISD[3:0] Number of MFO Clock Cycles ~T
ISD
Nom. Sample Per. (µs)
0000 13 104
0001 16 128
0010 20 160
0011 25 200
0100 32 256
0101 40 320
0110 51 480
0111 64 512
1000 81 648
1001 102 816
1010 128 1024
1011 161 1288
1100 203 1624
1101 256 2048
1110 323 2584
1111 406 3248
Note: The initial sample delay settings less than 2048 µs are intended for use cases
where absolute accuracy is not required, e.g. relative changes are being measured.
Therefore, the published data sheet tolerances are valid for only the initial sample delay
settings of 2048, 2584, and 3248 µs, and the MCU is placed into the STOP4 mode. All
other settings may return an increased offset when compared to an absolute reference.
10.20 Parameter registers (PARAM0 to PARAM63)
The 64 bytes of parameter registers are located at addresses $0050 through $008F.
The 64 bytes of parameter registers are kept active in all modes of operation as long