NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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10.8.5.3 Active BDM enabled in STOP mode
If the ENBDM bit in BDCSCR is set, entry into the ACTIVE BACKGROUND DEBUG
mode from RUN mode is enabled. The BDCSCR register is not memory mapped so
it can only be accessed through the BDM interface by use of the BDM commands
READ_STATUS and WRITE_CONTROL. If ENBDM is set when the CPU executes a
STOP instruction, the system clocks to the BACKGROUND DEBUG logic remain active
when the MCU enters STOP mode so BACKGROUND DEBUG communication is still
possible. In addition, the voltage regulator does not enter its low-power standby state but
maintains full internal regulation. If the user attempts to enter the STOP1 with ENBDM
set, the MCU will instead enter this mode which is STOP4 with system clocks running.
Most BACKGROUND commands are not available in STOP mode. The memory-access-
with-status commands do not allow memory access, but they report an error indicating
that the MCU is in STOP mode. The BACKGROUND command can be used to wake the
MCU from stop and enter ACTIVE BACKGROUND mode if the ENBDM bit is set. Once
in BACKGROUND DEBUG mode, all BACKGROUND commands are available.
10.8.5.4 MCU on-chip peripheral modules in STOP modes
When the MCU enters any STOP mode, system clocks to the internal peripheral modules
except the wake-up timer and LFR detectors/decoder are stopped. Even in the exception
case (ENBDM = 1), where clocks are kept alive to the BACKGROUND debug logic,
clocks to the peripheral systems are halted to reduce power consumption.
10.8.5.4.1 I/O pins
If the MCU is configured to go into STOP1 mode, the I/O pins are forced to their default
reset state (Hi-Z) upon entry into stop. This means that the I/O input and output buffers
are turned off and the pullup is disconnected.
10.8.5.4.2 Memory
All module interface registers are reset upon wake-up from STOP1 and the contents of
RAM are not preserved. The MCU must be initialized as upon reset. The contents of the
FLASH memory are non-volatile and are preserved in any of the STOP modes.
10.8.5.4.3 Parameter registers
The 64 bytes of parameter registers are kept active in all modes of operation as long as
power is applied to the supply pins. The contents of the parameter registers behave like
RAM and are unaffected by any reset.
10.8.5.4.4 LFO
The LFO remains active regardless of any mode of operation.
10.8.5.4.5 FRC
The Free-Running Counter can be enabled or halted. Once enabled and not halted, the
FRC remains active regardless of any mode of operation.
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