NXP Semiconductors UM11227 - Tab. 177. PMC Status and Control 1 Register (SPMSC1) (Address $1809); Tab. 178. SPMSC1 Register Field Descriptions

NXP Semiconductors
UM11227
NTM88 family of tire pressure monitor sensors
UM11227 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 6 — 24 April 2020
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Table 177. PMC status and control 1 register (SPMSC1) (address $1809)
Bit 7 6 5 4 3 2 1 0
R LVDF 0
W — LVDACK
LVDIE LVDRE LVDSE LVDE — BGBE
Reset U 0 0 1 1 1 0 0
POR ($1C) 0 0 0 1 1 1 0 0
Table 178. SPMSC1 register field descriptions
Field Description
7
LVDF
LVDF – Low Voltage Detection Flag
The LVDF bit indicates the Low Voltage Detect status if LVDE is set.
0 = Low voltage has not been detected; Result of power-on reset; Existing state retained from resets of
Stop1 exit, low voltage detection, external pin, COP, PWU, illegal opcode, illegal address, soft reset, and
back-ground debugger.
1 = Low voltage is being or has been detected.
6
LVDACK
LVDACK – LVD Interrupt Acknowledge
Writing a logic 1 to LVDACK clears the LVD interrupt request and clears LVDF to a logic 0 if low voltage is
not detected.
0 = Read result; Write no effect; Result of Reset
1 = Write 1 to clear LVDF for Low Voltage Detect acknowledge.
5
LVDIE
LVDIE – LVD Interrupt Enable
The LVDIE bit controls the LVD interrupt if LVDE is set. This bit has no effect if the LVDE bit is a logic 0.
0 = LVD interrupt disabled; Result of Reset
1 = LVD interrupt enabled
4
LVDRE
LVDRE – LVD Reset Enable
The LVDRE bit controls the LVD reset if LVDE is set. The LVDRE is writable only once after each exit from
a system reset. This bit has no effect if the LVDE bit is a logic 0. LVD reset has priority over LVD interrupt, if
both are enabled. In all test modes, the LVDRE bit value is ignored and functions as if the LVDRE bit value
is equal to 0.
0 = LVD reset disabled.
1 = LVD reset enabled; Result of Reset
3
LVDSE
LVDSE – LVD Stop Enable
The LVDSE bit controls the behavior of the LVD when the MCU stop mode is entered if LVDE is set. This bit
has no effect if the LVDE bit is a logic 0.
0 = LVD disabled in MCU stop mode.
1 = LVD enabled in MCU stop mode; Result of Reset
2
LVDE
LVDE – LVD Enable Bit
The LVDE bit controls whether the LVD is enabled. The LVDE is writable only once after each exit from a
system reset.
0 = LVD is disabled.
1 = LVD is enabled; Result of Reset
0
BGBE
BGBE – Band gap Buffer Enable
The BGBE bit is used to enable the band gap buffered output.
0 = Band gap buffer disabled; Result of Reset
1 = Band gap buffer enabled.